By A. Vachoux
This e-book encompasses a number of the simplest contributions to the discussion board on Specification and layout Languages held in 2005 (FDL'05). It offers distinct insights into contemporary works facing a wide spectrum of matters in system-on-chip layout. all of the chapters were conscientiously revised and prolonged to supply up to date info. additionally they offer seeds for extra researches and advancements within the box of heterogeneous systems-on-chip layout.
Read Online or Download Applications of Specification and Design Languages for SoCs: Selected papers from FDL 2005 (Chdl) PDF
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Extra info for Applications of Specification and Design Languages for SoCs: Selected papers from FDL 2005 (Chdl)
In another direction, a complete formal proof of the library components is being performed. Theorem-proving techniques are applied to obtain a proof that is independent of the valuation of the temporal parameter (number of cycles or time interval) present in many operators. Acknowledgments The authors thank Y. Wolfsthal, E. Zarpas, and G. Shapir from the IBM Haifa Research Laboratory for giving free access to RuleBase and FoCs. , and Wolfsthal, Y. (2000) FoCs: automatic generation of simulation checkers from formal specifications.
2), if both signals s3 and s4 are delivered through a service channel, they are split, resulting in two derived signals s3 and s4 , which are now the input signals to the Sum process. Apparently, the two pairs of signals, s3 and s3 , s4 and s4 , and the two derived signals s3 and s4 are not synchronous. A synchronous system becomes globally asynchronous, leading to a possibly nondeterministic behavior that deviates from the specification. It is therefore important for a refinement to maintain synchronization consistency for functional correctness.
In particular, let us consider some typical working situations. For example, when granted access to the AMBA bus, a master device always has to declare the features of a new transfer right from the start, without modifying these features during the transfer. Moreover, if the selected slave device replies with an ERROR response, a master device always has to set HTRANS signal to IDLE (ARM, 1999). All these behavioural rules are examples of the rules univocally fixed by the AMBA AHB protocol. So every master device has to reproduce these rules always in the same way.